1. Field
This disclosure relates generally to nonvolatile memory cells, and more specifically, to driving a control gate with a select gate signal in a split-gate nonvolatile memory cell.
2. Related Art
Within a split gate memory cell array, each row of memory cells may be coupled to a control gate driver which drives a required voltage level onto the control gates of the split gate memory cells in accordance with the desired operation. For example, the voltage applied to the control gate of a memory cell depends on whether the desired operation of that memory cell is a program select operation, a program deselect operation, an erase operation, an erase verify operation, a program verify operation, etc. For some operations, decoding information at high voltage is required for the control gate of the memory cell. Control gate drivers typically have to drive more than 1 row of control gates in order to reduce layout area. However, this may result in high voltages being applied to other control gates within the array even when the particular memory cell is not the subject of the instant operation. Therefore, a need exists for an improved control gate driver to reduce disturb levels at the control gate.